Ultrathin oxide-nitride gate dielectric MOSFET's

Low frequency gate noise modeling of ultrathin Oxide MOSFETs

An analytical model for 1/f gate noise is developed and applied to the simulation and the characterization of ultra-thin MOSFETs. The proposed model is based on oxide trapping mechanisms and uses the concept of equivalent flat band voltage fluctuations. The developed model reproduces experimental behaviors. The power spectral density of flat band voltage fluctuation extracted from gate current ...

Characterization and Modeling of Edge Direct Tunneling (EDT) Leakage in Ultrathin Gate Oxide MOSFETs

This paper examines the edge direct tunneling (EDT) of electron from n polysilicon to underlying n-type drain extension in off-state n-channel MOSFET’s having ultrathin gate oxide thicknesses (1.4–2.4 nm). It is found that for thinner oxide thicknesses, electron EDT is more pronounced over the conventional gate-induced-drain-leakage (GIDL), bulk band-to-band tunneling (BTBT), and gate-to-substr...

Effect of gate dielectric on threshold voltage of Nanoscale MOSFETS

An integrated circuit (IC) dimensions continue to decrease, RC delay, crosstalk noise, and power dissipation of the interconnect structure become limiting factors for ultra-large-scale integration of integrated circuits. Modern microcircuits may have eight metal layers, each separated by only 0.1 micrometers. RC delays and cross talk rather than transistor speed are now the major performance li...

Design, fabrication, and characterization of germanium MOSFETs with high-k gate dielectric stacks based on the nitride interfacial layers

Temperature-accelerated dielectric breakdown in ultrathin gate oxides